Problem Cop0MF/MT

[Frederic]

Hello, I'm Frederic and I'm creating my own N64 emulator by viewing and
reading all the docs I have.

I think I have found a bug in PJ64 interpretor source code, at Cop0 MF/MT level :

That is your code :

void RSP_Cop0_MF (void) {
switch (RSPOpC.rd) {
case 4: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_STATUS_REG; break;
case 5: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_DMA_FULL_REG; break;
case 6: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_DMA_BUSY_REG; break;
case 7:
RSP_GPR[RSPOpC.rt].W = 0;
//RSP_GPR[RSPOpC.rt].W = *RSPInfo.SP_SEMAPHORE_REG;
//*RSPInfo.SP_SEMAPHORE_REG = 1;
break;
case 8: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.DPC_START_REG ; break;
case 9: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.DPC_END_REG ; break;
case 10: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.DPC_CURRENT_REG; break;
case 11: RSP_GPR[RSPOpC.rt].W = *RSPInfo.DPC_STATUS_REG; break;
case 12: RSP_GPR[RSPOpC.rt].W = *RSPInfo.DPC_CLOCK_REG; break;
default:
DisplayError("have not implemented RSP MF CP0 reg %s (%d)",COP0_Name(RSPOpC.rd),RSPOpC.rd);
}
}

And what the documentation of R4000 MIPS say :

T: data ¬ CPR[0,rd]
T+1: GPR[rt] ¬ (data31)32 || data31...0
With these register :

0 Index Programmable pointer into TLB array
1 Random Pseudorandom pointer into TLB array (read only)
2 EntryLo0 Low half of TLB entry for even virtual address (VPN)
3 EntryLo1 Low half of TLB entry for odd virtual address (VPN)
4 Context Pointer to kernel virtual page table entry (PTE) in 32-bit
addressing mode
5 PageMask TLB Page Mask
6 Wired Number of wired TLB entries
7 — Reserved
8 BadVAddr Bad virtual address
9 Count Timer Count
10 EntryHi High half of TLB entry
11 Compare Timer Compare
12 SR Status register
13 Cause Cause of last exception
14 EPC Exception Program Counter
15 PRId Processor Revision Identifier
16 Config Configuration register
17 LLAddr Load Linked Address
18 WatchLo Memory reference trap address low bits
19 WatchHi Memory reference trap address high bits
20 XContext Pointer to kernel virtual PTE table in 64-bit addressing mode
21–25 — Reserved
26 ECC Secondary-cache error checking and correcting (ECC) and
Primary parity
27 CacheErr Cache Error and Status register
28 TagLo Cache Tag register
29 TagHi Cache Tag register
30 ErrorEPC Error Exception Program Counter
31 — Reserved

Please tell me if I'm wrong, and thank you in advance.

 

[zilmar]

RSP_Cop0_MF

MF COP0 for RSP

RSP is a modified r4k, it is not a r4k so I do not see this as an issue

 

[Frederic]

Thanks a lot for your answer.